Delta-Sigma modulation (also referred to as Sigma-Delta modulation) is one of the widely used principles for analog-to-digital conversion.
Delta-Sigma modulation is based on oversampling and noise-shaping providing among others a large dynamic range which is desirable for many applications. The term noise-shaping refers to the effect that the modulator moves the quantization noise to a frequency range outside the signal frequency range such that it can easily be suppressed in a digital post-processing step through digital filtering.
The Delta-Sigma modulator receives the analog signal at its input and provides the oversampled digital data at its output. Digital data appears with the high oversampling rate of the modulator at the modulator output and has a rather small bitwidth. Many modulator types use only a single-bit comparator which means that they output a digital single-bit stream. This single bit stream is typically filtered in order to remove undesired quantization noise and to receive multi-bit words of the desired resolution (for example 8, 16, 20 or more bit) at a lower sampling frequency. This means that a complete Delta-Sigma analog-to-digital converter comprises a modulator and digital filter.
The main factors for achieving a high signal-to-noise ratio and a large dynamic range are the oversampling factor and the order of the Delta-Sigma modulator. The oversampling rate is the quotient of sampling rate of the modulator divided by the Nyquist frequency.
The higher the sampling rate (and thereby the oversampling ratio) and/or the order of a modulator, the higher is the achievable dynamic range. However, with an increasing sampling rate and/or order of the modulator, the power consumption and the complexity also increase.
There are various different architectures for Delta-Sigma modulators each having their specific advantages and disadvantages. The order of a Delta-Sigma modulator is primarily determined by the number of integrators (or integration stages) of the modulator. The integrators or integration stages are often implemented as switched capacitor circuits.
A second order Delta-Sigma modulator mainly comprises two integrators, a comparator and a digital-analog converter. A system theoretical structure of a feedforward second order modulator is shown in FIG. 1. The output signal of the first integrator, the output signal of the second integrator and the input signal are directly fed to the comparator input. At the input summing point, a reference signal depended on the comparator output signal of the last integration step (second integrator) is subtracted from the input signal. The resulting signal corresponds to the quantization error.
In a feedback architecture, the reference signal would be subtracted from the input signal and the output of the first integrator. The comparator input signal would be the output signal of the second integrator.
The way of interconnecting the integration stages, the comparator and the inputs and outputs in accordance with a given modulator architecture determines the signal and noise transfer functions of a modulator, as it is well known to those skilled in the art.
Other factors that influence the performance of a Delta-Sigma modulator and thereby the performance of the analog-to-digital converter using the Delta-Sigma modulator are, for example the noise introduced through the supply and reference voltages, the characteristics of the comparator and matching of the used components.
The maximum theoretically achievable signal-to-noise ratio of a Delta-Sigma modulator can also be increased, if a multi-bit comparator instead of a single-bit comparator is used. However, using multi-bit comparators entails other problems and may, for example affect linearity of the Delta-Sigma modulator. The most robust solution is a single-bit comparator.
The first integrator or integration stage of the modulator has a major influence on the overall performance of the Delta-Sigma modulator. The present invention therefore focuses on an improved architecture for the first integrator. As previously described, one possibility to improve the performance of a Delta-Sigma modulator consists in increasing the oversampling ratio, which however, usually entails higher power consumption.
Increasing the sampling rate without substantially increasing the power consumption or maintaining the sampling rate while decreasing the power consumption can be achieved by a technique which is referred to as double sampling. Using double sampling for Delta-Sigma modulators is generally known in the art. There are various double sampling Delta-Sigma modulators known in the art, as for example from “A second-order double-sampled delta-sigma modulator using additive-error switching”, Burmas, T. V.; Dyer, K. C.; Hurst, P. J.; Lewis, S. H.; Solid-State Circuits, IEEE, Volume: 31 Issue:3, pages 284-293. There are various drawbacks of the solutions given in the above cited reference. These drawbacks relate to the specific way of sampling, the use of the capacitors during sampling, the comparators and the general architectures of the Delta-Sigma modulators.